Semi Additive Process (SAP) Technologies:

Electronic industry is rapidly moving towards finer pitches to accommodate higher speed required out of components. We have seen a migration from 1mm pitch to 0.8, 0.5, 0.4 and now 0.25mm pitches. At the same time the number of I/O required are increasing. We have started seeing increasing designs with sub 50µm (0.002”) line and spacing. Convention methods of forming traces are not going to be able to produce these circuit boards at a reasonable yield.

In 2017 FTG started investigating Semi Additive Process (SAP) to improve our capabilities. At present we are working with Averatek and are offering a limited volume capability to process Layers requiring ≥50 µm (0.002”) lines and traces.

Benefits:

• Reduction in size and weight by 90% over current state-of-the-art in the US
• Effectively reduce layer count and lamination cycles
• Significant RF advantages over traditional subtractive etch processes
• Increased electronics density within a fixed area

Technical Papers:

• Material Reliability & Performance Study
• Stack Microvia Reliability
• Wrap Plating
• Trouble shooting Microvias